Individual skill
gpio-baremetal
Use when configuring GPIO modes, alternate functions, pull resistors, or EXTI interrupts on STM32/nRF/ESP32-class MCUs. Not for register access rules: use mmio-and-bit-manipulation.
.devin/skills/gpio-baremetal/SKILL.md
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- Last checked
- Nov 4, 2026
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- Sep 28, 2026
- License
- Apache-2.0
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SKILL.mdcore · 5,865 bytesagents/openai.yamlasset · 187 bytes
Read excerpt
# GPIO on bare metal
## Contract
| Field | Bound contract |
|---|---|
| Trigger | A pin must be driven, read, muxed to a peripheral, or made to raise an interrupt on an edge, without a vendor HAL. |
| Authority | Read-only: emits pin configuration sequences and interrupt setup to chat; the user places them in the firmware. Rollback is not needed because no file is written. No remote mutation. |
| Side effect | Chat output only. |
| Done | The sequence enables the port clock, sets mode, pull, speed, and alternate function from the datasheet AF table, and for an interrupt pin routes the line, selects the edge, and enables the NVIC entry, with each register bit named after the reference manual. |
## Inputs
- Target part and the pin (port and number) from the schematic.