Individual skill

matlab-design-dsphdl-ddc

Use when designing a Digital Down Converter (DDC) using dsphdl System objects. Triggers on requests involving DDC design, frequency down-conversion for FPGA/ASIC, NCO + mixer + decimation filter chains, fractional/non-integer sample rate conversion, or HDL-optimized receiver front-end signal processing.

skills-catalog/signal-processing/matlab-design-dsphdl-ddc/SKILL.md

Source commit 032b4b605999b1f4adecaac1efa1c9faad41adf6

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Yes

Observed behavior

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Last checked

Nov 3, 2026

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