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dac-experiments

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Use when designing or auditing the empirical evaluation of an ACM/IEEE Design Automation Conference (DAC) Research Manuscript, covering standard EDA benchmark suites (ISPD, EPFL, ISCAS/ITC, TAU, CircuitNet, OpenROAD flows), fair state-of-the-art baselines, QoR/PPA reporting with runtime, per-benchmark honesty, ablations that isolate the mechanism, and contamination-aware ML-for-EDA evaluation.

DAC-Skills/skills/dac-experiments/SKILL.md

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# DAC Experiments

Use this before the November deadline when the evaluation is not yet locked. At DAC the evaluation
*is* the paper: reviewers are EDA practitioners who decide acceptance mostly on whether the **QoR
comparison is fair, standard, and reproducible**. The organizing principle is **measured design
quality against the strongest baseline on recognized benchmarks** — not novelty in the abstract.

## Evaluation audit

- **Use standard benchmark suites.** Match the suite to the task: **ISPD** placement/routing
  contests, the **EPFL** combinational benchmark suite for logic synthesis, **ISCAS'85/'89** and
  **ITC'99** for test/verification, the **TAU** contests for timing, **CircuitNet/OpenABC-D** and
  similar for ML-for-EDA, and **OpenROAD / OpenROAD-flow-scripts** for full-flow experiments. A
  private-benchmark-only evaluation is a scored weakness.
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