Individual skill
debug
Find why an FPGA build failed (Vivado, HLS, PetaLinux) and how to fix it.
skills/debug/SKILL.md
Source commit e5b0d0adf6932b6135eaec0caf97614f2fb573da
What was checked
- Matches the observed repository HEAD
- Yes
- Scanner rules are current
- No
- Repository scan complete
- No
- Skill scan complete
- Yes
- Observed behavior
- Not checked yet
- Last checked
- Nov 6, 2026
These are observations at the recorded commit, not a guarantee of safety. Review the source before running it.
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Repository context
- Repository stars (not skill ratings)
- 27
- Repository last updated
- Nov 1, 2026
- License
- MIT
Observed agent integration: No specific integration evidence. Standard SKILL.md installation does not imply verified compatibility.
- agent-skills Repository topic
- cdc Repository topic
- claude-code Repository topic
- fpga Repository topic
- pynq Repository topic
- rtl Repository topic
- verilog Repository topic
- vhdl Repository topic
- vivado Repository topic
- zynq Repository topic
- engineering Derived category
Files and excerpt
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Browse files
SKILL.mdcore · 612 bytes
Read excerpt
Find why the FPGA build failed. Arguments ($ARGUMENTS) are a log file or a project folder; if none, use the current
folder and the logs with errors that the build summary lists first.
Read `../fpga-project-analyzer/SKILL.md` (relative to this file's directory) and follow it: `logs` for the log,
`build` + `show` to locate the cause in the design. Reply with the root cause, where it is (file:line or block),
and the exact fix.