Individual skill
rtl-linting
RTL code quality checking and linting. Runs lint rules, identifies synthesis issues, detects inferred latches, and generates lint reports with waivers.
library/specializations/fpga-programming/skills/rtl-linting/SKILL.md
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- Last checked
- Nov 3, 2026
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- Repository last updated
- Nov 1, 2026
- License
- MIT
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# RTL Linting Skill
Expert skill for RTL code quality checking and linting using Verible, SpyGlass, and vendor tools. Provides comprehensive code analysis for synthesis issues, coding style, CDC violations, and best practice enforcement.
## Overview
The RTL Linting skill enables comprehensive RTL code quality checking, supporting:
- SpyGlass/Ascent lint rule execution
- Verible SystemVerilog linting and formatting
- Vivado and Quartus lint checks
- Synthesis coding issue detection
- Inferred latch identification
- Clock domain violation checking
- Reset handling verification