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sva-assertions

Specialized skill for creating and debugging SystemVerilog assertions for FPGA verification

library/specializations/fpga-programming/skills/sva-assertions/SKILL.md

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# SVA Assertions Skill

## Overview

Expert skill for SystemVerilog Assertions (SVA) development, enabling formal property specification and verification for FPGA designs.

## Capabilities

- Write concurrent and immediate assertions
- Create property specifications and sequences
- Implement coverage properties (cover property)
- Create assume properties for formal verification
- Debug assertion failures with cause analysis
- Generate assertion bind files
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