Individual skill
mmio-and-bit-manipulation
Use when accessing memory-mapped peripherals with volatile, bit masks, read-modify-write, register alignment, or endianness in bare-metal firmware. Not for pin setup: use gpio-baremetal.
.devin/skills/mmio-and-bit-manipulation/SKILL.md
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- Last checked
- Nov 4, 2026
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- Sep 28, 2026
- License
- Apache-2.0
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SKILL.mdcore · 6,447 bytesagents/openai.yamlasset · 226 bytes
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# MMIO and bit manipulation
## Contract
| Field | Bound contract |
|---|---|
| Trigger | A peripheral register must be read or written without a HAL, a register shows stale reads or lost updates, C bitfields are being replaced with masks, or an ISR and the main loop touch the same register. |
| Authority | Read-only: emits access patterns, macros, and diagnostics to chat; the user places them in the firmware. Rollback is not needed because no file is written. No remote mutation. |
| Side effect | Chat output only. |
| Done | Every register access in the guidance is `volatile` with the width the reference manual states, every field write uses named shift and mask constants, shared registers use a race-free update, and barriers appear only where the ordering they enforce is named. |
## Inputs
- Target core and part (Cortex-M0+, M3, M4, M7, or another), and the peripheral.