Individual skill

resolve-design-errors

Use when asked to run Design Error Detection (quick defect scan), find design errors in a Simulink model, perform root cause analysis on DED findings, fix division-by-zero, overflow, dead logic or out-of-bounds defects detected by SLDV, or diagnose why missing coverage cannot be achieved (dead logic blocking coverage objectives). Do NOT use for requirement verification, test generation, Inf/NaN detection, active logic analysis, or coverage measurement.

skills-catalog/verification-validation-and-test/resolve-design-errors/SKILL.md

Source commit d41676970f86e58fa69b7aa29f84931ec7d5f34f

What was checked

Matches the observed repository HEAD

Yes

Scanner rules are current

Yes

Repository scan complete

No

Skill scan complete

Yes

Observed behavior

Network or broad shell

Last checked

Nov 5, 2026

These are observations at the recorded commit, not a guarantee of safety. Review the source before running it.

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